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Full Record Details
DOI
10.5286/raltr.2017006
Persistent URL
http://purl.org/net/epubs/work/33589610
Record Status
Checked
Record Id
33589610
Title
Experiments with sparse Cholesky using a parametrized task graph implementation
Contributors
IS Duff (STFC Rutherford Appleton Lab.)
,
F Lopez (STFC Rutherford Appleton Lab.)
Abstract
We describe the design of a sparse direct solver for symmetric positive-definite systems using the PaRSEC runtime system. In this approach the application is represented as a DAG of tasks and the runtime system is in charge of running the DAG on the target architecture. Portability of the code across different architectures is enabled by delegating to the runtime system the task scheduling and data management. Although runtime systems have been exploited widely in the context of dense linear algebra, the DAGs arising in sparse linear algebra algorithms remain a challenge for such tools because of their irregularity. In addition to overheads induced by the runtime system, the programming model used to describe the DAG impacts the performance and the scalability of the code. In this study we investigate the use of a Parametrized Task Graph (PTG) model for implementing a task-based supernodal method. We discuss the benefits and limitations of this model compared to the popular Sequential Task Flow model (STF) and conduct numerical experiments on a multicore system to assess our approach. We also validate the performance of our solver SpLLT by comparing it to the state-of-the-art solver MA87 from the HSL library.
Organisation
STFC
,
SCI-COMP
,
SCI-COMP-CM
Keywords
sparse Cholesky
,
PaRSEC
,
SPD systems
,
runtime systems
Funding Information
EU
, Horizon 2020 (NLAFET Project) (671633)
Related Research Object(s):
41659563
Licence Information:
Creative Commons Attribution 3.0 Unported (CC BY 3.0)
Language
English (EN)
Type
Details
URI(s)
Local file(s)
Year
Report
RAL Technical Reports
RAL-TR-2017-006. STFC, 2017.
RAL-TR-2017-006.pdf
2017
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