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Full Record Details
Persistent URL
http://purl.org/net/epubs/work/45185198
Record Status
Checked
Record Id
45185198
Title
Soft Error Performance of High-Speed Pulsed-DICE-Latch Design in 16 nm and 7 nm FinFET Processes
Contributors
B Narasimham
,
K Chandrasekharan
,
JK Wang
,
BL Bhuva
Abstract
Organisation
ISIS
,
STFC
,
ISIS-CHIPIR
Keywords
Funding Information
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Language
English (EN)
Type
Details
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Year
Paper In Conference Proceedings
In 2019 IEEE International Reliability Physics Symposium, Monterey, California, USA, 31 Mar 2019 - 4 Apr 2019, (2019): 1-4.
doi:10.1109/IRPS.2019.8720408
2019
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